3T1D memory cells using gated diodes and methods of use thereof

Static information storage and retrieval – Systems using particular element – Semiconductive

Reexamination Certificate

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C365S149000, C365S187000, C365S188000, C365S230050

Reexamination Certificate

active

07027326

ABSTRACT:
A memory cell comprises: (1) a write switch, the first terminal of the write switch coupled to an at least one bitline, the control terminal of the write switch coupled to the first control line; (2) a two terminal semiconductor, the first terminal of the two terminal semiconductor device coupled to the second terminal of the write switch, and the second terminal of the two terminal semiconductor device coupled to an at least one second control line, wherein the two terminal semiconductor device has a capacitance when a voltage on the first terminal relative to the second terminal is above a threshold voltage and has a lower capacitance when the voltage on the first terminal relative to the second terminal is less than the threshold voltage; (3) a read select switch, the control terminal of the read select switch coupled to an at least one second control line, the first terminal of the read select switch coupled to the at least one bitline; and (4) a read switch, the control terminal of the read switch coupled to the first terminal of the gated diode and coupled to the second terminal of the write switch, the first terminal of the read switch coupled to the second terminal of the read select gate, and the second terminal of the read switch coupled to ground.

REFERENCES:
patent: 4308594 (1981-12-01), Jiang
patent: 5841690 (1998-11-01), Shibutani et al.
patent: 2005/0128803 (2005-06-01), Luk et al.
patent: 2005/0145895 (2005-07-01), Luk et al.
Luk et al., “Gated Diode Memory Cells,” U.S. Appl. No. 10/735,061 (filed Dec. 11, 2003).
Luk et al., “Amplifiers Using Gated Diodes,” U.S. Appl. No. 10/751,714 (filed Jan. 5, 2004).

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