3-D integrated semiconductor device comprising intermediate...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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C257S774000, C257S772000, C257S712000, C257S705000, C257S706000, C257S707000, C257SE23141, C257SE23011

Reexamination Certificate

active

08080866

ABSTRACT:
In a three-dimensional chip configuration, a heat spreading material may be positioned between adjacent chips and also between a chip and a carrier substrate, thereby significantly enhancing heat dissipation capability. Furthermore, appropriately sized and positioned through holes in the heat spreading material may enable electrical chip-to-chip connections, while responding thermally conductive connectors may extend to the heat sink without actually contacting the corresponding chips.

REFERENCES:
patent: 2007/0075413 (2007-04-01), Egawa
patent: 2007/0176277 (2007-08-01), Brunnbauer et al.
patent: 2008/0042261 (2008-02-01), Wolter et al.
patent: 2006229163 (2006-08-01), None
Translation of Official Communication from German Patent Office for German Patent Application No. 10 2008 044 986.5-33 dated Apr. 17, 2009.

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