Multiplying circuit comprising switched-capacitor circuits

Multiplying circuit with improved linearity and reduced leakage

Multiplying interface circuit for level shifting between FET and

Multipurpose semiconductor circuits utilizing a novel semiconduc

Multipurpose switching circuits utilizing a novel semiconductor

Multisegment Hall element for offset voltage compensation

Multistage electrical ladder for decrementing a signal into a pl

Multistage logic circuit arrangement

Multivalued integrated injection logic circuitry and method

Multivibrator circuit having compensated delay time

Multiwavelength optical-to-electrical logic operations

Muting arrangement for AM synchronous detector using a PLL circu

Muting circuit

Muting circuit