Semiconductor memory device with simultaneously activated elemen

Details Semiconductor memory device with simultaneously activated elemen Semiconductor memory device with simultaneously activated elemen

1998-12-16

2000-04-25

Tran, Andrew Q.

Static information storage and retrieval

Read/write circuit

Bad bit

36523003, 3652257, 36518907, G11C 700

Patent

active

060551976

ABSTRACT:
In a semiconductor memory device, assuming that the ratio of a memory capacity of a region of a memory array per one of elements, which are simultaneously activated in the memory array in which x elements (x is an integer of two or more) are simultaneously activated and which is divided into a plurality of repair regions, each of which has at least two elements, to a memory capacity in one of the repair regions corresponding to one of spare element groups is y (y is an integer of one or more), each of the repair regions is designed so that a plurality of elements are simultaneously activated in its own repair region, and each of the spare element groups is designed so that the number of spare elements simultaneously activated in each of the spare element groups is one. Thus, it is possible to effectively reduce electric current consumption in the total of redundant control circuits.

REFERENCES:
patent: 5544113 (1996-08-01), Kirihata et al.
patent: 5561636 (1996-10-01), Kirihata et al.
patent: 5901094 (1999-05-01), Chin et al.
patent: 5936269 (1999-08-01), Kusaba
Kirihata, et al. "Fault-Tolerant Designs for 256 Mb DRAM," IEEE Journal of Solid-State Circuits, vol. 31, No. 4, Apr. 1996 pp. 558-566.

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