Polysilicon gate having a metal plug, for reduced gate resistanc

Details Polysilicon gate having a metal plug, for reduced gate resistanc Polysilicon gate having a metal plug, for reduced gate resistanc

1999-04-02

2000-12-26

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

438291, 438305, 438595, 438672, H01L 21336, H01L 213205, H01L 214763, H01L 2144

Patent

active

061658820

ABSTRACT:
A device and method to reduce resistance in polysilicon gates by forming a highly conductive plug within a trench in the gate. This is achieved by etching a trench between nitride sidewalls and into the polysilicon layer and depositing a metal (e.g. tungsten) plug therein. Certain embodiments include a gate structure positioned on a silicon substrate and a gate oxide layer positioned on the silicon substrate, a polysilicon layer positioned on the gate oxide layer, a nitride layer, which includes nitride sidewalls, positioned on the polysilicon layer, and a tungsten plug that is positioned within a first trench portion between the nitride sidewalls and a second trench portion in the polysilicon layer.

REFERENCES:
patent: 4948459 (1990-08-01), van Laarhoven et al.
patent: 5341016 (1994-08-01), Prall et al.
patent: 5686331 (1997-11-01), Song
patent: 6060376 (2000-05-01), Gabriel et al.
patent: 6066552 (2000-05-01), Figura

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