Non-volatile memory cell having dual gate electrodes

Details Non-volatile memory cell having dual gate electrodes Non-volatile memory cell having dual gate electrodes

1996-07-26

1998-05-12

Saadat, Mahshid D.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257 67, 257 70, 257318, 257321, H01L 2976, H01L 29788

Patent

active

057510377

ABSTRACT:
A non-volatile memory device in which gate electrodes are formed on an upper surface and a lower surface of the channel via insulating layers, respectively, one of them is used as a read electrode and the other is used as a write electrode, whereby, at a read operation the reading is carried out without exerting an influence upon stored charges stored at the time of writing. Particularly, it has a structure in which a source and drain region of the non-volatile semiconductor memory device in formed in the semiconductor layer formed on the insulating layer and, at the same time, one of the read electrode and write electrode is buried in the insulating layer.

REFERENCES:
patent: 4667217 (1987-05-01), Janning
patent: 4669062 (1987-05-01), Nakano
patent: 5136540 (1992-08-01), Hayashi et al.
patent: 5488243 (1996-01-01), Tsuruta et al.
patent: 5567959 (1996-10-01), Mineji

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