Method for forming a contact VIA

Details Method for forming a contact VIA Method for forming a contact VIA

1989-06-08

1990-10-09

James, Andrew J.

Fishing, trapping, and vermin destroying

437189, H01L 2348

Patent

active

049624148

ABSTRACT:
A method for forming a connection between two levels in a semiconductor structure includes first forming a VIA (14) through an insulating layer (12) to an underlying structure (10). Sidewall spacers (22) and (24) are formed on the vertical walls of the VIA (14). The spacers (22) and (24) have tapered surfaces. A barrier layer (30) is then formed over the bottom surface of the VIA followed by CVD deposition of a conductive layer (32) of WSi.sub.2 to provide a conformal conductive layer. An aluminum layer (38) is then deposited by physical vapor deposition techniques with the descending portions of layer (32) providing a conductive connection between the aluminum layer (38) and the lower structure (10) in the VIA (14).

REFERENCES:
patent: 4489481 (1984-12-01), Jones
patent: 4502209 (1985-03-01), Eizenberg
patent: 4507171 (1985-03-01), Bhatia
patent: 4507851 (1985-04-01), Joyner et al.
patent: 4566026 (1986-01-01), Lee et al.
patent: 4619037 (1986-10-01), Taguchi
patent: 4680612 (1987-07-01), Hieber et al.
patent: 4720908 (1988-01-01), Wills
patent: 4795722 (1989-01-01), Welch et al.
IBM Technical Disclosure Bulletin, vol. 28, #4, p. 1442 Sep. 1985.

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