Processor and information processing apparatus with a reconfigur

Details Processor and information processing apparatus with a reconfigur Processor and information processing apparatus with a reconfigur

1998-03-12

2000-12-05

Ellis, Richard L.

Electrical computers and digital processing systems: processing

Processing control

Instruction modification based on condition

712209, 712229, G06F 9318

Patent

active

061579971

ABSTRACT:
Part or all of an instruction decoder is constructed of a first reconfigurable circuit wherein a circuit structure thereof can be changed according to an external signal. Further, a second reconfigurable circuit which is connected to output side of a register file as part of processing unit and wherein a circuit structure thereof can be changed according to an external signal is preliminarily provided. For special use, to achieve a predetermined operating function, the second reconfigurable circuit is reconstructed by the external signal. Further, a particular instruction corresponding to the predetermined operating function is set, and the first reconfigurable circuit is so reconstructed by an external signal that when the particular instruction is inputted, a corresponding control signal is outputted. When the particular instruction is executed, the first reconfigurable circuit outputs a control signal and the second reconfigurable circuit executes the predetermined operating function by that control signal.

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Wirthlin, Michael J., The Nano Processor: a Low Resource Reconfigurable Processor, IEEE Workshop on FPGAs for Custom Computing Machines, Apr. 10-13, 1994.

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