Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1991-06-27
1992-12-08
Epps, Georgia Y.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
361311, 361312, 361313, 365149, 437 30, 437 41, 437 52, 437 60, 257309, H01L 2968
Patent
active
051702339
ABSTRACT:
A method of fabricating a semiconductor wafer comprises providing an electrically conductive area on a semiconductor wafer. Multiple alternating layers of first and second materials are provided atop the wafer. The first and second materials need be selectively etchable relative to one another. The multiple layers are etched and the electrically conductive area upwardly exposed to define exposed edges of the multiple layers projecting upwardly from the electrically conductive area. One of the first or second materials is selectively isotropically etched relative to the other to produce indentations which extend generally laterally into the exposed edges of the multiple layers. A layer of electrically conductive material is applied atop the wafer and electrically conductive area, and fills the exposed edge indentations. The electrically conductive material is etched to leave conductive material extending upwardly from the electrically conductive area adjacent the multiple layer edges and within the indentations. The multiple layers are etched from the wafer to leave upwardly projecting conductive material having lateral projections extending therefrom. Such material is used to form the lower plate of a capacitor.
REFERENCES:
patent: 4981810 (1991-01-01), Fazan et al.
patent: 5006481 (1991-04-01), Chan et al.
patent: 5061650 (1991-10-01), Dennison et al.
patent: 5081559 (1992-01-01), Fazan et al.
Fazan, et al., "Thin Nitride Films on Textured Polysilicon to Increase Multimegabit DRAM Cell Charge Capacity", IEEE Electron Device Letter, vol. 11, No. 7, Jul. 1990.
T. Mine, et al., "Capacitance-Enhanced Stacked-Capacitor with Engraved Storage Electrode for Deep Submicron DRAMs", Extended Abstracts of the 21st Conference on Solid State Devices and Materials, Tokyo, 1989, pp. 137-140.
H. Watanbe, et al., "A New Stacked Capacitor Structure Using Hemispherical-Grain (HSG) Poly-Silicon Electrodes", Extended Abstracts of the 22nd (1990 International) Conf. on Solid State Devices & Materials, Sendai, 1990, pp. 873-876.
Hayashide, et al., "Fabrication of Storage Capacitance-Enhanced Capacitors with a Rough Electrode", Extended Abstracts of the 22nd (1990 International) Conf. on Solid State Devices & Materials, Sendai, 1990, pp. 869-872.
Chan Hiang C.
Dennison Charles H.
Fazan Pierre C.
Liu Yauh-Ching
Rhodes Howard E.
Epps Georgia Y.
Micro)n Technology, Inc.
LandOfFree
Method for increasing capacitive surface area of a conductive ma does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for increasing capacitive surface area of a conductive ma, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for increasing capacitive surface area of a conductive ma will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-963777