MOS field-effect transistor with sidewall spacers

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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437 41, 437149, 257338, 257900, H01L 2910, H01L 21265

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active

051702320

ABSTRACT:
In a n-channel MOS transistor of LDD structure with sidewall spacers, a p-type diffusion layer is formed to be on the surface of a n.sup.- drain layer just underneath the sidewall spacer and to be separated from the channel region. The low impurity concentration drain layer therefore becomes separated from the sidewall spacer, and thus degradation incident to LDD due to injection of hot carriers into the sidewall spacer can be prevented.

REFERENCES:
patent: 4697333 (1987-10-01), Nakahara
patent: 4823173 (1989-04-01), Beasom
patent: 4949136 (1990-08-01), Jain
IEEE Transactions on Electron Devices, vol. ED-33, No. 11, Nov., 1986, New York US, pp. 1769-1779; Sergio Bampi et al.: "A Modified Lightly Doped Drain Structure for VLSI MOSFETs".
Patents Abstracts of Japan, vol. 10, No. 16 (E-375)(2073) Jan. 22, 1986 & JP-A-60 177677 (Suwa Deikosha K.K.) Sep. 11, 1985 (Computer obtained abstract).
Search Report for European Patent Application No. EP 90 11 6095, Feb. 7, 1991.
International Electron Devices Meeting 1985, Washington, D.C., Dec. 1-4, 1985, pp. 234-237, S. Bampi, et al., "Modified LDD Device Structures for VLSI".

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