Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1997-08-15
2000-12-05
Bowers, Charles
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438299, 438581, 438583, 438655, 438664, 438683, H01L 214763
Patent
active
061566322
ABSTRACT:
A method of forming a polycide structure in accordance with the present invention includes forming a polysilicon layer on a surface. A refractory metal silicide portion of the polycide structure is formed on the polysilicon layer and the polysilicon portion of the polycide line is formed after formation of the metal siticide portion. The formation of the metal silicide portion of the polycide structure may include forming an oxide hard mask over the polysilicon layer exposing line portions of the polysilicon layer. The exposed line portions of the polysilicon layer are silicided resulting in a refractory metal silicide portion and unreacted material over the oxide hard mask. The unreacted material and oxide hard mask are then removed. The refractory metal silicide portion may be formed by forming a refractory metal or metal silicide layer, such as cobalt or cobalt silicide, over the oxide hard mask and exposed portions of the polysilicon layer. The refractory metal or metal silicide layer is then reacted with the polysilicon layer resulting in the refractory meal silicide portion of the polycide structure. Another method includes forming a polycide structure by using a refractory metal silicide portion of the polycide structure as a hard mask to remove portions of an underlying layer of polysilicon to form the polysilicon portion of the polycide structure. The polycide structure may be a polycide bit line, word line, interconnect or any other polycide structure.
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Bowers Charles
Micro)n Technology, Inc.
Nguyen Thanh
LandOfFree
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