Method of making a high density interconnect formation

Details Method of making a high density interconnect formation Method of making a high density interconnect formation

1997-11-12

2000-09-12

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438622, 438597, 438598, 438625, 438639, 438629, 438631, 438633, 438675, 438669, 438672, H01L 214763

Patent

active

061177601

ABSTRACT:
A technique is provided for forming interconnects laterally spaced from each other across a semiconductor topography by a deposited dielectric spacer layer. The lateral distance between each interconnect is advantageously dictated by the thickness of the spacer layer rather than by the minimum feature size of a lithographically patterned masking layer. In an embodiment, a first and second conductive interconnects are formed a spaced distance apart upon a semiconductor topography. The first and second interconnects are defined using optical lithography and an etch technique. A dielectric layer is CVD deposited across the exposed surfaces of the first and second interconnects and of the semiconductor topography. The CVD deposition conditions are controlled so as to form a relatively thin spacers laterally adjacent the sidewalls of the interconnects. A conductive material is then deposited across into a trench arranged between the first and second interconnects, and CMP polished such that the upper surface of the conductive material is at an elevational level proximate that of the surfaces of the interconnects. A third interconnect is thereby formed within the trench laterally adjacent the first and second interconnects.

REFERENCES:
patent: 5017515 (1991-05-01), Gill
patent: 5767012 (1998-06-01), Fulford, Jr. et al.
patent: 5888872 (1999-03-01), Gardner et al.
patent: 5926700 (1999-07-01), Gardner et al.

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