Semiconductor memory having redundant memory array

Static information storage and retrieval – Read/write circuit – Bad bit

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36523001, G11C 1300

Patent

active

058089454

ABSTRACT:
A semiconductor memory wherein memory cells are arranged in a matrix and word lines or bit lines have hierarchical structures, where the efficiency of redundancy is increased by replacing a defective memory cell existing in a column or row by a sub word line unit or a sub bit line unit.

REFERENCES:
patent: 5659509 (1997-08-01), Bocca et al.

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