Method of forming a polycide gate of a semiconductor device

Details Method of forming a polycide gate of a semiconductor device Method of forming a polycide gate of a semiconductor device

1996-05-07

1999-06-01

Nguyen, Nam

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

438710, 438737, 438719, 438721, 438714, H01L 2100

Patent

active

059087919

ABSTRACT:
A method of forming a polycide gate of a semiconductor device, including the steps of etching all the metal silicide layer by using a plasma, and etching the polysilicon layer by relatively decreasing power for increasing the energy of a particles constituting the plasma, as compared with that in the step of etching the metal silicide layer. A physically and functionally stable polycide gate can be simply and rapidly formed.

REFERENCES:
patent: 4331962 (1982-05-01), Neumann
patent: 4808259 (1989-02-01), Jillie, Jr. et al.
patent: 5118387 (1992-06-01), Kadomura
patent: 5310456 (1994-05-01), Kadomura
patent: 5314576 (1994-05-01), Kadomura
patent: 5338701 (1994-08-01), Hsu et al.
patent: 5368685 (1994-11-01), Kumihashi et al.
patent: 5474648 (1995-12-01), Patrick et al.
patent: 5529197 (1996-06-01), Grewal
patent: 5605601 (1997-02-01), Kawasaki

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