Method of making single-electron-tunneling CMOS transistors

Details Method of making single-electron-tunneling CMOS transistors Method of making single-electron-tunneling CMOS transistors

1998-03-02

2000-09-12

Wilczewski, Mary

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

438164, 438440, H01L 218238, H01L 21762

Patent

active

061177113

ABSTRACT:
The present invention includes forming field oxide (FOX) isolations on a substrate. A pad oxide layer is then formed on the substrate. An ion implantation is carried out to dope dopants into the substrate by using FOX as a hard mask. Thus, a buried oxygen amorphized region is formed in the substrate. Subsequently, a high temperature thermal anneal is performed to convert the oxygen amorphized region into an buried oxide layer, thereby forming localized Si islands between the substrate and the buried oxide layer. A further thermal oxidation is used to narrow the thickness of the localized Si islands, thereby forming nanometer Si wires. Then, a further ultra thin gate oxide layer is regrow on the nanometer Si wires. Then, CMOS transistors are formed on the substrate.

REFERENCES:
patent: 5593813 (1997-01-01), Kim
patent: 5658809 (1997-08-01), Nakashima et al.
patent: 5877048 (1999-03-01), Wu
patent: 5886380 (1999-03-01), Nakajima
patent: 5923981 (1999-07-01), Qian
patent: 6010934 (2000-01-01), Wu

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