Method for manufacturing a semiconductor wiring structure includ

Details Method for manufacturing a semiconductor wiring structure includ Method for manufacturing a semiconductor wiring structure includ

1995-04-26

1997-01-28

Niebling, John

Fishing, trapping, and vermin destroying

437 50, 437 51, 437984, H01L 2128

Patent

active

055977634

ABSTRACT:
In a highly integrated semiconductor wiring structure having a plurality of wiring layers and a self-aligned contact hole formed therebetween, the wiring layer is formed such that a portion where a contact hole will be formed is formed to a first wiring width and a remaining portion is formed to a second wiring width being wider than the first wiring width. In the method for manufacturing such a structure, the contact hole is formed in self-alignment fashion, and thus, a short which may occur due to misalignment can be prevented.

REFERENCES:
patent: 4967393 (1990-10-01), Yokoyomo et al.
IBM Technical Disclosure Bulletin, vol. 31, No. 4, Sep. 1988, pp. 249-252.

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