Process for forming high aspect ratio circuit features

Details Process for forming high aspect ratio circuit features Process for forming high aspect ratio circuit features

1999-06-01

2000-02-01

Bowers, Charles

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438669, 438687, 438703, 438672, 438674, B44C 122

Patent

active

060202610

ABSTRACT:
A method of forming high resolution circuit features on a substrate. A `seed` layer of copper (110) is deposited on a dielectric substrate (100). A dielectric layer (120) is then deposited on the copper layer, and an aluminum `mask` layer (130) is deposited on the dielectric layer. A photoresist layer (140) is spun on or laminated to the aluminum. The photoresist layer is imaged and developed to define a circuit pattern such that portions (230) of the aluminum `mask` layer are revealed, and these revealed portions are further etched so as to reveal portions (320) of the dielectric layer that are directly underneath. The remaining portions of the photoresist layer are stripped away, along with the revealed underlying portions of the dielectric film, exposing portions (410) of the copper layer in the image of the circuit pattern. The remaining portions of the aluminum mask are then removed, and the exposed copper is then electroplated to form the desired circuit traces (600). The remaining portions of the dielectric layer are stripped to expose the unplated portions of the copper layer, and these unplated portions are etched away with acid.

REFERENCES:
patent: 5028454 (1991-07-01), Lytle et al.
patent: 5281304 (1994-01-01), Kadomura
patent: 5525204 (1996-06-01), Surboff et al.
patent: 5792594 (1998-08-01), Brown et al.
patent: 5937326 (1995-06-01), Cho

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