Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step
Patent
1981-11-12
1983-06-28
Massie, Jerome W.
Adhesive bonding and miscellaneous chemical manufacture
Delaminating processes adapted for specified product
Delaminating in preparation for post processing recycling step
29571, 29580, 156649, 156653, 156657, 357 50, 357 23, 427 93, 427 94, 427399, H01L 21308
Patent
active
043903932
ABSTRACT:
A method of defining in a substrate of silicon an active region, a region of field oxide and an isolating wall of silicon dioxide therebetween in a single masking step. The substrate is covered in succession with a thin layer of silicon dioxide, a thick layer of silicon nitride and a first film of titanium. The first film of titanium is covered with a layer of photoresist which has a removed portion and a retained portion in registry with the active region. The first film of titanium and the layer of silicon nitride are etched through the removed portions of the layer of photoresist to form an opening extending to the thin layer of silicon dioxide and partially underlying the retained portion of the photoresist layer by a predetermined lateral distance. A second film of titanium is deposited on the retained portion of the photoresist layer and the exposed portion of the thin layer of silicon dioxide. The retained portion of the photoresist layer with the portion of the second film of titanium thereon is removed. Thus, an edge of the retained portion of said first film of titanium is laterally spaced from an adjacent edge of the retained portion of the second film of titanium deposited on the thin layer of silicon dioxide by approximately the aforementioned predetermined lateral distance. Using the first and second thin layers of titanium, a trench is etched into the substrate. The trench is thereafter filled with silicon dioxide.
REFERENCES:
patent: 3886000 (1975-05-01), Bratter et al.
patent: 3966577 (1976-06-01), Hochberg
patent: 4042726 (1977-08-01), Kaji
patent: 4063992 (1977-12-01), Hosack
patent: 4104086 (1978-08-01), Bondur et al.
patent: 4139442 (1979-02-01), Bondur et al.
patent: 4140558 (1979-02-01), Murphy et al.
patent: 4203800 (1980-05-01), Kitcher et al.
patent: 4274909 (1981-06-01), Venkataraman et al.
patent: 4317273 (1982-03-01), Guterman et al.
patent: 4333965 (1982-06-01), Chow et al.
Ghezzo Mario
Griffing Bruce F.
Davis Jr. James C.
General Electric Company
Massie Jerome W.
Snyder Marvin
Zaskalicky Julius J.
LandOfFree
Method of forming an isolation trench in a semiconductor substra does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of forming an isolation trench in a semiconductor substra, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming an isolation trench in a semiconductor substra will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-932403