Dynamic random access memory (DRAM) semiconductor device

Details Dynamic random access memory (DRAM) semiconductor device Dynamic random access memory (DRAM) semiconductor device

1994-03-15

1996-03-26

Loke, Steven H.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257301, 257329, 257330, H01L 27108, H01L 2976, H01L 2994, H01L 31062

Patent

active

055023207

ABSTRACT:
A semiconductor device comprising a semiconductor substrate of first conductivity type, a trench type element isolation region formed in a preset depth from the semiconductor substrate surface, an element region of the first conductivity type surrounded by the element isolation region, a gate trench for forming a gate electrode, the trench being formed in the semiconductor substrate with a smaller depth than the element isolation region and extending through the element region and element isolation region, a gate electrode buried in the bottom portion of the gate trench via a gate insulation film, and source and drain regions of a second conductivity type formed in the element region and separated from each other by the gate trench, wherein the top surface of the gate electrode lies higher than the bottom levels of the source and drain regions and lower than a contact surface of the source and drain regions.

REFERENCES:
patent: 4243997 (1981-01-01), Natori et al.
patent: 4453305 (1984-06-01), Janes et al.
patent: 4630088 (1986-12-01), Ogura et al.
patent: 5072269 (1991-12-01), Hieda
patent: 5248893 (1993-09-01), Sakamoto
IBM Technical Disclosure Bulletin, vol. 33, No. 3A, 1990, pp. 72-75.
IBM Technical Disclosure Bulletin, vol. 32, No. 9A, 1990, pp. 380-382.
Electronics, Jul. 9, 1987, issue 14, pp. 75-77.
IBM Technical Disclosure Bulletin, vol. 31, No. 3, 1988, pp. 279-286.
Symposium on VLSI Technology Digest of Technical Papers, pp. 83-84, D. S. Wen, et al., "A Fully Planarized 0.25 .mu.m CMOS Technology".
IEEE International Solid-State Circuits Conference, pp. 46-47, 1993, T. Hasegawa, et al., "An Experimental DRAM with a NAND-Structured Cell".

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