Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Patent
1998-11-02
1999-09-21
NGuyen, Tuan H.
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
438256, 438399, 438210, H01L 2120
Patent
active
059565942
ABSTRACT:
A method for creating a DRAM device, featuring the simultaneous formation of a capacitor plate, used for a stacked capacitor structure, and the formation of a metal contact structure, and of a word line contact structure, has been developed. The process features the deposition of a barrier layer, and an overlying tungsten layer, on a storage node electrode, and with the deposition also completely filling a metal contact hole, and a word line hole. A patterning procedure, using an anisotropic RIE procedure, removes unwanted regions of tungsten and barrier layer, resulting in a capacitor plate, a metal contact structure, and a word line structure, all comprised of tungsten and the barrier layers, and all formed via one deposition procedure, and patterned using one RIE procedure.
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Chen Bi-Ling
Jeng Erik S.
Yang Fu-Liang
Ackerman Stephen B.
Nguyen Tuan H.
Saile George O.
Vanguard International Semiconductor Corporation
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