Method for fabricating multilevel interconnection structure for

Details Method for fabricating multilevel interconnection structure for Method for fabricating multilevel interconnection structure for

1997-04-17

1999-07-27

Everhart, Caridad

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438620, 438637, 438700, H01L 2144

Patent

active

059306670

ABSTRACT:
The present invention provides a novel interconnection structure which comprises an insulation layer having a contact hole which extends in a first vertical direction, a contact layer residing within the contact hole and being made of a first conductive material which has a first electromigration resistance, and an interconnection layer extending within the insulation layer. The interconnection layer has one end portion which is in contact with one end of the contact layer. The interconnection layer is made of a second conductive material having a second electromigration resistance which is smaller than the first electromigration resistance. The interconnection layer has a reservoir portion which is made of the second conductive material. The reservoir portion extends within the insulation layer and extends from the one end portion of the interconnection layer in a second vertical direction which is opposite to the first vertical direction.

REFERENCES:
patent: 5192713 (1993-03-01), Harada
patent: 5281850 (1994-01-01), Kanamori
patent: 5407861 (1995-04-01), Marangon et al.
patent: 5416359 (1995-05-01), Oda
patent: 5633201 (1997-05-01), Choi
Hisako Ono, et al. "Development of a Planarized Al-Si Contact Filling Technology" 1990 Proc. 7th International VLSI Multilevel Interconnect. Conf. IEEE. pp. 76-82, Jun. 12-13, 1990.
H. Rathore et al., "Electromigration and Current-Carrying Implications for Aluminum-Based Metallurgy with Tungsten Stud-Via Interconnections", Sibmicrometer Metallization, 1992, vol. 1805, pp. 251-262.

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