Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1989-12-27
1990-12-04
Moffitt, James W.
Static information storage and retrieval
Read/write circuit
Bad bit
371 103, G11C 800
Patent
active
049758810
ABSTRACT:
A semiconductor memory device having a redundant memory cell group selectable by a redundant decoder operable by a small power consumption is disclosed. The redundant decoder comprises a plurality of address program circuits which store address of a defective memory cell or cells and a control circuit for enabling the address program circuits when at least one defective memory cell is present and disenabling the address program circuits when no defective memory cell is present.
REFERENCES:
patent: 4660178 (1987-04-01), Hardee et al.
patent: 4723227 (1988-02-01), Murotani
patent: 4791319 (1988-12-01), Tagami et al.
Moffitt James W.
NEC Corporation
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