Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1997-11-13
1999-07-27
Abraham, Fetsum
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257 59, 257 72, 257 53, 257202, 257222, 349 54, 349 82, 349139, 349143, G02F 113
Patent
active
059294892
ABSTRACT:
In a flat panel display or other large-area electronics device, each cell of a matrix comprises a thin-film switching transistor (T1) connected between a respective column conductor (CC) and a respective cell electrode (C.sub.LC). Row conductors (RR) of the matrix comprise a conductive film pattern (14) on an insulating film pattern (13) on a semiconductor film pattern (12); portions (11a) of the semiconductor film pattern (11) provide channel regions of the switching transistors (T1), while portions (14a) of the conductive film pattern provide gate electrodes of the switching transistors (T1) connected to the respective row conductor (RR; 14b). Each cell also has a storage capacitor (C.sub.s) formed with the row conductor (RR(n-1); 14b) of a neighbouring cell by a lower conductive film part (11c) present under the insulating and semiconductor film patterns (13 and 12) of the row conductor (RR(n-1); 14b) of the neighbouring cell. In order to reduce the effect of parasitic thin-film transistors (T2, T3) formed by these row conductors (RR) between said lower conductive film part (11c) and neighbouring column conductors (CC), the parasitic transistor channel regions which are provided by a part (12p) of the semiconductor film pattern (12) are dimensioned to have a length (L) greater than their respective width (W; W1), and their width (W; W1) is preferably made smaller than the width (W2) of the row conductor (RR; 14b) and its semiconductor film pattern (12) in the area of its storage capacitor (C.sub.S). This smaller width (W; W1) of the row conductor (RR; 14b) in the area of the parasitic transistors (T2, T3) is preferably retained where the row conductor (RR; 14b) crosses over the neighbouring column conductors (CC).
REFERENCES:
patent: 4723838 (1988-02-01), Aoki et al.
patent: 5130829 (1992-07-01), Shannon
patent: 5238861 (1993-08-01), Morin et al.
"Very Simple a-Si;H TFT Fabrication Process for LCD-TV Application" by M. le Contellec et al., published in J. Non-Crystalline Solids vol. 97 & 98 (1987) pp. 297-300.
Abraham Fetsum
Fox John C.
U.S. Philips Corporation
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