System for N-bit part failure detection using n-bit error detect

Details System for N-bit part failure detection using n-bit error detect System for N-bit part failure detection using n-bit error detect

1997-06-30

1999-12-14

Moise, Emmanuel L.

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

714764, 714758, G06F 1110

Patent

active

060031522

ABSTRACT:
A system for N-bit part failure detection using n-bit error detecting codes where n is less than N is disclosed. In a computer system having storage devices N bits wide and an error detection and correction capability of less than N bits, bit assignments are made so that storage device failures will be detectable because of the manner the effect of a part failure is distributed among multiple codewords. Consequently 8 and 16 bit wide DRAMs may be used in a memory system using error detection and correction codes which are not capable of detecting 8 or 16 bit errors in a codeword, and still preserve the ability to detect the worst errors possibly caused by a part failure. Further, since error detection and correction codes with a predefined error detection and correction capability generally do not double in number of bits required when the data portion of a codeword doubles, the present invention allows use of the remaining bits when using larger data words, not only for special data, but also for another error detection and correction code for the special data, all still preserving the ability to detect any part failures, even when a part failure causes a number of total bit errors far exceeding the error detection capability of the error detection and correction codes.

REFERENCES:
patent: 5278847 (1994-01-01), Helbig, Sr. et al.
patent: 5450423 (1995-09-01), Iwasaka et al.
patent: 5490155 (1996-02-01), Abdoo et al.
patent: 5644753 (1997-07-01), Ebrahim et al.
"32-Bit-Wide Memory Tolerates Failures" NTIS Tech Notes, Oct. 1990, p. 818.
"A Class of Odd-Weight-Column SEC-DED-SbED Codes for Memory System Applications", S. Kaneda, IEEE Transactions on Computers, vol. C-33, No. 8 (Aug. 1984).

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