Single chip processor with externally executed test function

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

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G06F 1100

Patent

active

060031417

ABSTRACT:
In a single chip processor including an instruction ROM and a decoder for decoding instruction codes from the instruction ROM. During usual operation a multiplexer selects supplying instruction codes from the instruction ROM to the decoder. Alternatively, test instruction codes are input from an input interface via the multiplexer to the decoder in a test mode.

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patent: 5201056 (1993-04-01), Daniel et al.
patent: 5202978 (1993-04-01), Nozuyama
patent: 5680600 (1997-10-01), Childers et al.

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