Method for synchronizing signals and structures therefor

Details Method for synchronizing signals and structures therefor Method for synchronizing signals and structures therefor

1996-09-24

1998-10-06

Tse, Young T.

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375373, 370518, 370519, 327271, 327277, H03D 324

Patent

active

058188908

ABSTRACT:
A serial data signal is synchronized to a clock signal in a synchronization circuit (10). Synchronization is accomplished by generating a plurality of delayed versions of the serial data signal using serially connected delay elements (21-27). The delayed versions of the serial data signal are sampled using a set of flip-flops (11-18). The sampled delayed data signals appearing at the outputs of each flip-flop of the set of flip-flops (11-18) are used to determine which delayed data signal is most closely aligned to the clock signal. The output of the multiplexer (40) is an aligned serial data signal. In addition, a drift correction circuit (50) continuously monitors and corrects the alignment between the clock signal and the aligned serial data signal.

REFERENCES:
patent: 5022056 (1991-06-01), Henderson et al.
patent: 5166959 (1992-11-01), Chu et al.
patent: 5245231 (1993-09-01), Kocis et al.
patent: 5349612 (1994-09-01), Guo et al.
patent: 5400370 (1995-03-01), Guo

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