Method and apparatus for verifying erasure of memory blocks with

Details Method and apparatus for verifying erasure of memory blocks with Method and apparatus for verifying erasure of memory blocks with

1997-02-05

1999-07-27

Palys, Joseph E.

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

714 42, 714722, 36518529, 36518533, G06F 1100

Patent

active

059283700

ABSTRACT:
In a digital system having non-volatile memory devices for storage of digital information therein, the digital information being organized in sectors, each sector having a data field and a corresponding extension field, a controller device for performing operations such as reading and writing to and erasing information from a selected plurality of sectors and further verifying successful erasure of the selected erased sectors, the controller device including an error detection circuit for detecting errors within each of the sector data fields using the corresponding sector extension field and a flash interface circuit coupled to the non-volatile devices through a data bus for receiving an erased sector of information therethrough and being operative to pass the data field of the erased sector information and a predetermined extension field to the error detection circuit wherein the error detection circuit calculates an extension field corresponding to the erased sector data field, compares the calculated extension field to the predetermined extension field and upon the calculated extension field not matching the predetermined extension field, detects an error in the erased sector.

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