Phase lock by a frequency and phase difference between input and

Details Phase lock by a frequency and phase difference between input and Phase lock by a frequency and phase difference between input and

1997-03-06

1999-09-21

Pham, Chi H.

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375374, 327157, H03D 324

Patent

active

059563788

ABSTRACT:
Besides a frequency-phase comparator for input and VCO signals, a filter for a frequency-phase difference signal, and a VCO controlled by a filter output signal to produce a phase locked VCO signal, a PLL circuit comprises a VCO controller for controlling an oscillation frequency range of the VCO when the input and the VCO signals are continuously in collapse of synchronism longer than a predetermined time interval, such as a pull-in time of the PLL circuit, with the collapse detected by the comparator. Preferably, the VCO comprises an inverter loop, each inverter delay controlled by the filter output signal and a loop length controlled by a VCO control signal. The VCO controller comprises an up-down counter for counting up or down a count signal decoded into the VCO control signal with the count counted up and down depending on whether the frequency-phase difference signal indicates, when the predetermined time interval is measured by a timer started upon occurrence of a collapse, that the VCO signal is higher or lower in frequency than the input signal.

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Marc A. Rich, "Designing Phase-Locked Oscillators for Synchronization", IEEE Transactions on Communications, vol. COM-22, No. 7, Jul. 1974, pp. 890-896.

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