Method and apparatus for precise floating point exceptions

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G06F 748

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active

048796760

ABSTRACT:
In data processing systems of the type operable to perform floating point computations there is provided a method, and apparatus implementing that method, for predicting, in advance of the floating point computation, whether or not the computation will produce a floating point exception (e.g., overflow, underflow, etc.). The prediction method includes the steps of combining the exponent fields of the operands of the computation in a manner dictated by the type of operation (i.e., add, subtract, multiply, etc.), and comparing that combination, together with an indication of the computation to be performed (e.g., add, substract, multiply, or divide), to obtain an indication of the possibility of the computation ending in a floating point exception. If an exception is predicted, the indication can be used to halt other data processing operations until completion of the computation so that, in the event the computation actually results in a floating point exception, the handling of the exception can be accomplished with a minimum of effort.

REFERENCES:
patent: 4773035 (1988-09-01), Lee et al.
patent: 4788655 (1988-11-01), Nakayama et al.
Matsui et al, "An Overflow/Underflow-Free Floating-Point Representation of Numbers", J. of Infor. Processing, vol. 4, No. 3, 1981, pp. 123-133.

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