Static memory cell

Details Static memory cell Static memory cell

1996-07-31

1998-10-06

Nelms, David C.

Static information storage and retrieval

Systems using particular element

Flip-flop

257296, G11C 1100

Patent

active

058187502

ABSTRACT:
A static memory cell is described which has cross coupled pulldown transistors and dual access transistors. The memory cell is fabricated such that balanced current paths are formed through the two pulldown transistors. A single word line is used to activate the access transistors which couple the memory cell to complementary bit lines. The memory cells, as viewed in a plan view, have the single word line and gates of the pulldown transistors fabricated in parallel.

REFERENCES:
patent: 5173754 (1992-12-01), Manning
patent: 5196910 (1993-03-01), Moriuchi et al.
patent: 5212399 (1993-05-01), Manning
patent: 5215932 (1993-06-01), Manning
patent: 5240874 (1993-08-01), Roberts
patent: 5241206 (1993-08-01), Lee et al.
patent: 5273924 (1993-12-01), Chan et al.
patent: 5327377 (1994-07-01), Kawashima
patent: 5327394 (1994-07-01), Green et al.
patent: 5411909 (1995-05-01), Manning et al.
patent: 5422499 (1995-06-01), Manning
patent: 5568435 (1996-10-01), Marr
patent: 5583821 (1996-12-01), Rose et al.
patent: 5600588 (1997-02-01), Kawashima
patent: 5610856 (1997-03-01), Yoshizumi et al.
patent: 5675160 (1997-10-01), Oikawa
Copy of PCT Search Report mailed Dec. 2, 1997, for International application No. PCT/US 97/13498, 7 pages).
"ISSCC Digital ICs", Electronic Design, 37, No. 4, Hasbrouck Heights, MJ, US, pp. 49-53, (Feb. 23, 1989).

Affiliated with

Also associated with

Rating

Static memory cell does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Static memory cell, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Static memory cell will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-86335