Methods for forming nitrogen-rich regions in a floating gate and

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region

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438257, 438263, 438266, 438528, H01L 21265

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060017139

ABSTRACT:
Methods are provided for significantly reducing electron trapping in semiconductor devices having a floating gate and an overlying dielectric layer. The methods form a nitrogen-rich region within the floating gate near the interface to an overlying dielectric layer. The methods include selectively introducing nitrogen into the floating gate prior to forming the overlying dielectric layer. This forms an initial nitrogen concentration profile within the floating gate. An initial portion of the overlying dielectric layer is then formed of a high temperature oxide (HTO). The temperature within the floating gate is purposely raised to an adequately high temperature to cause the initial nitrogen concentration profile to change due to the migration of the majority of the nitrogen towards the interface with the overlying dielectric layer and an interface with an underlying layer. Consequently, the floating gate is left with a first nitrogen-rich region near the interface to the overlying dielectric layer and a second nitrogen-rich region near the interface to the underlying layer. The first nitrogen-rich region has been found to reduce electron trapping within the floating gate, which could lead to false programming of the floating gate. Unlike a conventional thermally grown oxide film, the high temperature oxide film within the interpoly dielectric layer advantageously prevents the surface of the floating gate from becoming too granular. As such, the resulting interpoly dielectric layer, which typically includes several films, can be formed more evenly.

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Yang et al. "Characteristics of Top-Gate Thin-Film Transistors Babricated on Nitrogen-Implanted Polysilicon Films," IEEE Trans. Electron Device, vol. 42. No. 12, 2163-2169, Dec. 1995.

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