Method and apparatus for reducing fixed charge in semiconductor

Details Method and apparatus for reducing fixed charge in semiconductor Method and apparatus for reducing fixed charge in semiconductor

1997-11-18

1999-08-03

Niebling, John F.

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

438781, 438782, 438787, 438789, H01L 2131

Patent

active

059337605

ABSTRACT:
The fixed charge in a borophosphosilicate glass insulating film deposited on a semiconductor device is reduced by reacting an organic precursor such as TEOS with O.sub.3. When done at temperatures higher than approximately 480 degrees C., the carbon level in the resulting film appears to be reduced, resulting in a higher threshold voltage for field transistor devices.

REFERENCES:
patent: 4872947 (1989-10-01), Wang et al.
patent: 4892753 (1990-01-01), Wang et al.
patent: 4960488 (1990-10-01), Law et al.
patent: 5000113 (1991-03-01), Wang et al.
patent: 5104482 (1992-04-01), Monkowski et al.
patent: 5354715 (1994-10-01), Wang et al.
patent: 5362526 (1994-11-01), Wang et al.
patent: 5382550 (1995-01-01), Iyer
patent: 5409858 (1995-04-01), Thakur et al.
patent: 5445699 (1995-08-01), Kamikawa et al.
patent: 5474955 (1995-12-01), Thakur
patent: 5576247 (1996-11-01), Yano et al.
PCT Search Report from Serial No. PCT/US96/10196, dated Sep. 30, 1996, 7 pages.
H. Wallace Fry, et al., "Applications of APCVD TEOS/03 thin films in ULSI IC fabrication", Solid State Technology, 37, No. 3, pp. 31-40, (Mar. 1994).
K. Fujino, et al., "Doped Silicon Oxide Deposition by Atmospheric Pressure and Low Temperature Chemical Vapor Deposition Using Tetraethoxysilane and Ozone", Journal of the Electrochemical Society, 138, No. 10, pp. 3019-3024, (Oct. 1991).
Kazuo Maeda, et al., "CVD TEOS/03: Development history and applications", Solid State Technology, 36, No. 6, pp. 83-88, (Jun. 1993).

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