Semiconductor memory device and defect repair method for semicon

Details Semiconductor memory device and defect repair method for semicon Semiconductor memory device and defect repair method for semicon

1997-08-20

1999-08-03

Mai, Son

Static information storage and retrieval

Read/write circuit

Bad bit

365222, G11C 700

Patent

active

059333774

ABSTRACT:
In a semiconductor memory device, rows of normal cell array blocks are selected by 13-bit row addresses corresponding to a refresh period of 8 kc respectively, so that the selected rows are successively refreshed. A spare memory array block is selected by a 12-bit row address for 4 kc excluding the most significant row address in the 13-bit row addresses corresponding to the row addresses of 8 kc. Thus, the semiconductor memory device can effectively carry out defect repair without reducing the yield also when a spare memory cell is inferior in data retention ability.

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patent: 5329490 (1994-07-01), Murotani
patent: 5355339 (1994-10-01), Oh et al.
patent: 5392247 (1995-02-01), Fujita
patent: 5491664 (1996-02-01), Phelan
patent: 5517450 (1996-05-01), Ohsawa
patent: 5574729 (1996-11-01), Kinoshita et al.

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