Semiconductor memory device incorporating redundancy memory cell

Details Semiconductor memory device incorporating redundancy memory cell Semiconductor memory device incorporating redundancy memory cell

1993-01-28

1995-02-28

Yoo, Do Hyun

Static information storage and retrieval

Read/write circuit

Bad bit

365201, 36523003, 36523006, G11C 1300

Patent

active

053943694

ABSTRACT:
In a semiconductor memory device which can perform a parallel test upon a predetermined number of memory cells by using a degenerate address of a plurality of first addresses each corresponding to one memory cell, when a defective memory cell is found by a parallel test using the degenerate address, an address whose space includes the space of the degenerate address is written into only one location of its corresponding redundancy decoder to replace the defective memory cell with its corresponding redundancy memory cell.

REFERENCES:
patent: 4908798 (1990-03-01), Urai
patent: 5148398 (1992-09-01), Kohno

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