Square computation circuit

Details Square computation circuit Square computation circuit

1993-12-13

1995-02-28

Malzahn, David H.

Boots, shoes, and leggings

G06F 7552

Patent

active

053943503

ABSTRACT:
A square computation circuit outputs data of 4-bits to 12-bits by inputting the input data of 2-bits to 6-bits, respectively. The relationships between inputs and outputs are obtained and then simplified, which simplifies circuit configuration and increases processing speed, over the case of the square computation performed using a conventional multiplier.

REFERENCES:
patent: 3610906 (1971-10-01), Stampler
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patent: 4313174 (1982-01-01), White
patent: 4766416 (1988-08-01), Noujaim
patent: 4787056 (1988-11-01), Dieterich
patent: 5337267 (1994-08-01), Colavin
Messer, D. D., "Convolutional Encoding and Viterbi Decoding Using the DSP56001 with a V.32 Modem Trellis Example," Motorola, Inc. 1989.
Fagan, A. et al., "Single DSP Chip Implementation of a High Speed Echo Cancelling Modem Employing Trellis Coding," Proc. of the Intnl. ESA Workshop on DSP Techniques Applied to Space Communications, Nov. 1988.

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