Flash memory cell structure having electrically isolated stacked

Details Flash memory cell structure having electrically isolated stacked Flash memory cell structure having electrically isolated stacked

1997-12-29

1999-08-03

Hardy, David B.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257316, H01L 29788

Patent

active

059329106

ABSTRACT:
This invention provides a flash memory cell structure comprising a semiconductor substrate; a tunneling oxide layer formed above the substrate and having a long narrow top profile; a gate oxide layer formed above the substrate on each side of the tunneling oxide layer; a bottom conductive layer formed above the substrate and surrounded the gate oxide layer; and a stacked gate formed above the tunneling oxide layer, the gate oxide layer and the bottom conductive layer, wherein there is an insulating layer between the stacked gate and the bottom conductive layer for electrically isolating the stacked gate from the bottom conductive layer, and that the stacked gate further comprises a floating gate, a dielectric layer and a control gate.

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