Method to implement a large resettable static RAM without the la

Static information storage and retrieval – Read/write circuit

Patent

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365218, G11C 700

Patent

active

052126633

ABSTRACT:
A resettable SRAM architecture and method that eliminates the need to reset all memory cells in the data memory array and requires only the resetting of one flag bit per block of data. This prevents superfluous activation of access circuits and memory cell transistors, thereby reducing power consumption and parasitic noise.

REFERENCES:
patent: 4975873 (1990-12-01), Nakabayashi et al.

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