Static information storage and retrieval – Systems using particular element – Capacitors
Patent
1993-03-02
1994-07-05
Clawson, Jr., Joseph E.
Static information storage and retrieval
Systems using particular element
Capacitors
36518904, 365182, 257309, G11C 11401
Patent
active
053273753
ABSTRACT:
A dynamic RAM is provided with enhanced charge storage capacity by increasing the surface area between the two electrodes of the storage capacitor. The first electrode consists of a thick conductive layer whose vertical sidewalls provide the extra surface area for charge storage. The second electrode is used to partially planarize the surface topology. The first electrode can also be used as the gate of a sensing transistor in a signal amplifying cell, as well as in multiport and multistate dynamic RAM cells.
REFERENCES:
patent: 4300212 (1981-11-01), Simko
patent: 4612629 (1986-09-01), Harari
patent: 4650544 (1987-03-01), Erb
patent: 4651184 (1987-03-01), Malhi
patent: 4752819 (1988-06-01), Koyama
patent: 4792834 (1988-12-01), Uchida
patent: 4797719 (1989-01-01), Ueda
patent: 4801989 (1989-01-01), Taguchi
patent: 4845539 (1989-07-01), Inoue
patent: 4890145 (1989-12-01), Malhi
patent: 4907047 (1990-03-01), Kato
patent: 4914628 (1990-04-01), Nishimura
patent: 4937641 (1990-06-01), Sunami
Chatterjee et al., "A Survey of High Density Dynamic DRAM Cell Concepts" IEEE Trans. Electron Devices, vol. ED27, No. 6 (Jun. 1979), pp. 827-839.
Lee et al., "A 64Kb MOS Dynamic RAM," IEEE Digest of Technical Papers 1979 ISSCC, pp. 146-147 no month.
Koyanagi et al., "Novel High Density, Stacked Capacitor MOS RAM", Technical Digest of IEEE 1978 International Electron Devices Meeting, pp. 348-351 no month.
Chatterjee et al., "Trench and Compact Structures for dRAMs", Technical Digests of IEEE International Electron Devices Meeting, Dec. 1986, pp. 128-131.
Inoue et al., "A 16 Mb DRAM with an Open Bit-Line Architecture," IEEE 1988 ISSCC Digest of Technical Papers, p. 246 no month.
Kotani et al., "A Highly Reliable Selective CVD-W Using SIH4 Reduction for VLSI Contacts" IEEE 1987 IEDM Digest of Technical Abstracts, pp. 217-220 no month.
Kaga et al., "A 4.2 Micro.sup.2 Half-VCC Sheath-Plate Capacitor DRAM Cell with Self-Aligned Buried Plate-Wiring", IEEE 1987 IEDM Digest of Tech. Papers no month.
Sakurai et al., Transparent-Refresh DRAM (TReD) Using Dual-Port DRAM Cell IEEE 1988 Custom Integrated Circuits Conference, p. 4.3.1 no month.
Furuyama et al., "An Experimental 2-Bits/Cell Storage DRAM for Macro Cell or Memory-on-Logic Application," IEEE 1988 Custom Integrated Circuits Conference no month.
A Survey of High Density Dynamic RAM Cell Concepts, IEEE Trans. Electron Devices vol. ED26, No. 6, Jun. 1979, pp. 827-839, Chatterjee et al.
A 64Kb MOS Dynamic RAM, IEEE Digest of Technical Papers, 1979 ISSCC, pp. 146-147, Lee et al. no month.
Novel High Density, Stacked Capacitor MOS RAM, Technical Digest of IEEE 1978 International Electron Devices Meeting, pp. 348-351, Koyanagi et al., no month.
Trench and Compact Structures for dRAMS, Technical Digests of IEEE International Electron Devices Meeting, Dec. 1986, pp. 128-131, Chatterjee et al.
A 16 Mb DRAM with an Open Bit-Line Architecture, IEEE 1988 ISSCC Digest of Technical Papers, p. 246, Inoue et al. no month.
A Highly Reliable Selective CVD-W Using SiH.sub.4 Reduction for VLSI Contacts, IEEE 1987 IEDM Digest of Technical Abstracts, pp. 217-220, Kotani et al. no month.
Transparent-Refresh DRAM (TReD) Using Dual-Ort DRAM Cell, IEEE 1988 Custom Integrated Circuits Conference, p. 4.3.1, Sakurai et al. no month.
An Experimental 2-Bits/Cell Storage DRAM for Macro Cell or Memory-on-Logic Application, IEEE 1988 Custom Integrated Circuits Conference, p. 4.4.1 Furuyama et al. no month.
Caserza Steven F.
Clawson Jr. Joseph E.
LandOfFree
DRAM cell utilizing novel capacitor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with DRAM cell utilizing novel capacitor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and DRAM cell utilizing novel capacitor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-801482