Digital adder and method for adding 64-bit, 16-bit and 8-bit wor

Details Digital adder and method for adding 64-bit, 16-bit and 8-bit wor Digital adder and method for adding 64-bit, 16-bit and 8-bit wor

1993-03-31

1994-07-05

Mai, Tan V.

Boots, shoes, and leggings

364788, 364749, G06F 750

Patent

active

053273699

ABSTRACT:
An adder for a 64-bit microprocessor which has three modes of operations, specifically, a 64-bit mode, a second mode where the adder in effect is four 16-bit adders and a third mode where the adder is, in effect, eight 8-bit adders. Two levels of Kogge-Stone trees are used, the first to generate group carries and propagate signals and the second for generating the carry signals for the 64-bit case. In the case of the 8-bit and 16-bit modes, the second level Kogge-Stone tree is not used, rather ordinary logic generates the appropriate carries. Exclusive ORing for conditional sums is performed in parallel with the generation of the carry signals.

REFERENCES:
patent: 4707800 (1987-11-01), Montoone et al.
patent: 4737926 (1988-04-01), Vo et al.
patent: 4768160 (1988-08-01), Yokoyama
patent: 4905180 (1990-02-01), Kumar
patent: 4914617 (1990-04-01), Putrino et al.
patent: 5047975 (1991-09-01), Patti et al.
patent: 5189636 (1993-02-01), Patti et al.

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