Dynamic random access memory device with capacitor between verti

Details Dynamic random access memory device with capacitor between verti Dynamic random access memory device with capacitor between verti

1993-07-01

1994-03-29

Clawson, Jr., Joseph E.

Static information storage and retrieval

Systems using particular element

Capacitors

365176, 257 66, 257306, 257309, 257311, G11C 502, G11C 506

Patent

active

052991555

ABSTRACT:
A dynamic random access memory device for storing 2-bit information, including a memory cell having two access transistors and one capacitor, wherein one of the access transistors is composed of a thin film transistor and disposed above the other access transistor which is formed in a substrate; and the capacitor is sandwiched by the two access transistors.

REFERENCES:
patent: 4642878 (1987-02-01), Maeda
patent: 4922312 (1990-05-01), Coleman et al.
patent: 4985718 (1991-01-01), Ishijima
patent: 5012310 (1991-04-01), Kimura et al.
patent: 5177574 (1993-01-01), Yoneda

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