Transistor having a lightly doped region

Details Transistor having a lightly doped region Transistor having a lightly doped region

1993-06-14

1994-06-07

Ngo, Ngan

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257408, 257584, 257588, 257900, H01L 2978, H01L 2972, H01L 2910

Patent

active

053192320

ABSTRACT:
A transistor (10 or 11) and method of formation. The transistor (10) has a substrate (12). The substrate (12) has an overlying dielectric layer (14) and an insulated conductive control electrode (16) which overlies the dielectric layer (14). A dielectric region (18) overlies the insulated conductive control electrode (16), and a dielectric region (20) is adjacent to the insulated conductive control electrode (16). A spacer (30) is adjacent to the dielectric region (20). Epitaxial regions (24) are adjacent to the spacer (30) and the spacer (30) is overlying portions of the epitaxial regions (24). A dielectric region (26) overlies the epitaxial regions (24). Highly doped source and drain regions (32) underlie the epitaxial regions (24). LDD regions (28), which are underlying the spacer (30), are adjacent to and electrically connected to the source and drain regions (32).

REFERENCES:
patent: 4789885 (1988-12-01), Brighton et al.
patent: 4839305 (1989-06-01), Brighton
patent: 4885617 (1989-12-01), Mazure-Espejo et al.
patent: 4886765 (1989-12-01), Chen et al.
patent: 4931408 (1990-06-01), Hshieh
patent: 4998150 (1991-03-01), Rodder et al.
patent: 5079180 (1992-01-01), Rodder et al.
patent: 5082794 (1992-01-01), Pfiester et al.
"A Self Aligned Pocket Implant (SPI) Technology for 0.2 mm-Dual Gate CMOS", by Hori et al., presented/published at IEEE International Electron Device Meting (IEDM) 1991, pp. 641-644.

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