Method of fabricating a lightly doped drain thin-film transistor

Details Method of fabricating a lightly doped drain thin-film transistor Method of fabricating a lightly doped drain thin-film transistor

1996-03-21

1997-06-10

Bowers, Jr., Charles L.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

430319, 430312, 438163, H01L 21265

Patent

active

056375190

ABSTRACT:
A method of fabricating a lightly doped drain thin-film transistor having an inverted staggered structure is disclosed. The transistor has a glass substrate and a gate formed by a Cr layer on the substrate. An insulating layer and a semiconductor layer are deposited on the substrate and the gate. A first photo-resist layer is coated on top of the semiconductor layer. Back-side exposure and self-aligned technique are used to form an unexposed area slightly smaller than the gate area with high energy light. Low energy ion implantation is then performed on the exposed semiconductor layer to produce the lightly doped region. After removing the first photo-resist layer, another photo-resist process including a second photo-resist coating, back-side exposure and self-aligned technique is performed to form an unexposed area slightly larger than the gate area with low energy light. High energy ion implantation is then performed on the exposed semiconductor layer. The twice photo-resist processes and ion implantation processes result in a lightly doped drain.

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