Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates
Patent
1997-08-15
1999-10-26
Picardat, Kevin M.
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
438458, 438459, H01L 2130, H01L 2146
Patent
active
059727802
ABSTRACT:
A thin film forming apparatus includes a specimen holder on which a substrate for thin film formation is placed, a transfer plate opposing the specimen holder, on which a sheet film having a thin film formed on a surface is placed, a thin film forming chamber comprising the specimen holder and the transfer plate, a pressure unit for moving at least one of the specimen holder and the transfer plate and pressing the specimen holder against the transfer plate for a predetermined time while the substrate and the thin film formed on the sheet film are in contact with each other, a heating unit for heating the substrate at a predetermined temperature, and an exhausting unit for vacuum-exhausting the thin film forming chamber.
REFERENCES:
patent: 5273938 (1993-12-01), Lin et al.
patent: 5286335 (1994-02-01), Drabik et al.
patent: 5324687 (1994-06-01), Wojnarowski
patent: 5374564 (1994-12-01), Bruel
patent: 5387551 (1995-02-01), Mizoguchi et al.
patent: 5656548 (1997-08-01), Zavracky et al.
K. Sato, S. Harada, A. Saiki, T. Kitamura, T. Okubo, and K. Mukai, "A Novel Planar Multilevel Interconnection Technology Utilizing Polymide", IEEE Trans. Part Hybrid Package., PHP-9, 176 (1973).
P. Elikins, K. Reinhardt, and R. Layer, "A planarization process for double metal CMOS using Spin-on Glass as a sacrficial layer," Proceeding of 3rd International IEEE VMIC Conf., 100 (1986).
K. Ehara, T. Morimoto, S. Muramoto, and S. Matsuo, "Planar Interconnection Technology for LSI Fabrication Utilizating Lift-off Process", J.Electochem Soc., vol. 131, No. 2,419 (1984).
C. Y. Ting, V. J. Vivalda, and H. G. Schaefer, "Study of Planarized Sputter-Deposited-SiO.sub.2 ", J. Vac. Sci. Technol. 15, 1105(1978).
K. Machida and H. Oikawa, "SiO.sub.2 Planarization Technology With Biasing and Electron Cyclotoron Resonance Plasma Deposition for Submicron Interconnections", J. Vac. Sci. Technol. B4, 818 (1986).
W. J. Patrick, W. L. Guthrie, C. L. Standley, P. M. Schiable, "Application of Chemical Mechanical Polishing to the Fabrication of VSLI Circuit Interconnections", J. Electrochem. Soc., vol. 138, No. 6, Jun., 1778 (1991).
Akiya Hideo
Imai Kazuo
Kyuragi Hakaru
Machida Katsuyuki
Collins D. Mark
Nippon Telegraph & Telephone Corporation
Picardat Kevin M.
LandOfFree
Thin film forming apparatus and method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Thin film forming apparatus and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Thin film forming apparatus and method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-763577