Synchronous memory device having an internal register

Details Synchronous memory device having an internal register Synchronous memory device having an internal register

1997-02-10

1999-09-21

Shin, Christopher B.

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output access regulation

710 3, 710 10, 710 61, 710107, 710129, 711167, G06F 1300

Patent

active

059548045

ABSTRACT:
The present invention is directed to an integrated circuit device having at least one memory section including a plurality of memory cells. The device includes an internal register to store an identification value which identifies the device on a bus. The device further includes interface circuitry, coupled to the bus, to receive identification information and a read request. The interface circuitry includes a plurality of output drivers and comparison circuitry. The output drivers are coupled to the bus to output data on the bus in response to the read request. The data is output synchronously with respect to first and second external clock signals when the comparison circuitry determines the identification information corresponds to the identification value.

REFERENCES:
patent: 3633166 (1972-01-01), Picard
patent: 3821715 (1974-06-01), Hoff, Jr. et al.
patent: 3882470 (1975-05-01), Hunter
patent: 3924241 (1975-12-01), Kronies
patent: 3972028 (1976-07-01), Weber et al.
patent: 3975714 (1976-08-01), Weber et al.
patent: 3983537 (1976-09-01), Parsons et al.
patent: 4007452 (1977-02-01), Hoff, Jr.
patent: 4191996 (1980-03-01), Chesley
patent: 4263650 (1981-04-01), Bennett
patent: 4286321 (1981-08-01), Baker et al.
patent: 4315308 (1982-02-01), Jackson
patent: 4333142 (1982-06-01), Chesley
patent: 4354258 (1982-10-01), Sato
patent: 4360870 (1982-11-01), McVey
patent: 4373183 (1983-02-01), Means et al.
patent: 4385350 (1983-05-01), Hansen et al.
patent: 4458357 (1984-07-01), Weymouth et al.
patent: 4470114 (1984-09-01), Gerhold
patent: 4481625 (1984-11-01), Roberts et al.
patent: 4488218 (1984-12-01), Grimes
patent: 4513370 (1985-04-01), Ziv et al.
patent: 4630193 (1986-12-01), Kris
patent: 4635196 (1987-01-01), Ceccon et al.
patent: 4660141 (1987-04-01), Ceccon et al.
patent: 4675813 (1987-06-01), Locke
patent: 4727455 (1988-02-01), Kiremidjian
patent: 4766536 (1988-08-01), Wilson, Jr. et al.
patent: 4775931 (1988-10-01), Dickie et al.
patent: 4811202 (1989-03-01), Schabowski
patent: 4916670 (1990-04-01), Suzuki et al.
patent: 4920486 (1990-04-01), Nielsen
patent: 4940909 (1990-07-01), Mulder et al.
patent: 5012408 (1991-04-01), Conroy
patent: 5038317 (1991-08-01), Callan et al.
patent: 5038320 (1991-08-01), Health et al.
patent: 5117494 (1992-05-01), Costes et al.
patent: 5129069 (1992-07-01), Helm et al.
patent: 5175822 (1992-12-01), Dixon et al.
patent: 5175831 (1992-12-01), Kumar
patent: 5179670 (1993-01-01), Farmwald et al.
Gilman D. Chesley, "Virtual Memory Integration", Sep. 1983, 4 pages total.

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