Submicron patterning without using submicron lithographic techni

Details Submicron patterning without using submicron lithographic techni Submicron patterning without using submicron lithographic techni

1980-07-14

1982-11-09

Smith, John D.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

29571, 156647, 156652, 156653, 156656, 156657, 1566591, 427 85, 427 86, 427 88, 427 93, 427 95, H01L 21283

Patent

active

043583407

ABSTRACT:
A method for the fabrication of submicron devices, without the use of submicron lithography. Vertical "zero undercut" etching techniques are employed, in order to convert the submicron thickness of a deposited thin film conductor layer and a thin film insulation layer into submicron gate widths that can be used in a wide variety of devices, including MOS field effect devices, for example. The conversion is achieved by depositing a thin film conductor layer of submicron thickness across a vertical step between adjacent insulator surfaces, and then vertically etching until the only remaining portion of the conductor layer is that portion adjacent the vertical step. The remaining insulation not covered by conductor is then removed. Thus, an insulated gate is provided having a submicron width approximately equal to the thickness of the conductor layer as initially deposited.

REFERENCES:
patent: 4209349 (1980-06-01), Ho
patent: 4209350 (1980-06-01), Ho
patent: 4256514 (1981-03-01), Pogge
patent: 4267011 (1981-05-01), Shibata
Jackson et al., "A Novel Submicron Fabrication Technique" Int. Electronic Device Meeting, Technical Abstracts, Dec. 1-3, 1979 Washington D. C.

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