MOS dynamic semiconductor memory cell

Details MOS dynamic semiconductor memory cell MOS dynamic semiconductor memory cell

1989-07-06

1992-09-15

Bowler, Alyssa H.

Static information storage and retrieval

Systems using particular element

Capacitors

36518909, 3072961, G11C 700, G11C 11407

Patent

active

051483939

ABSTRACT:
A semiconductor memory according to the present invention comprises a MOS dynamic semiconductor memory cell in which one terminal of a current path of one MOS transistor is connected to one capacitor element, the other terminal of the current path of the MOS transistor is connected to a bit line, and a gate electrode of the transistor is connected to a word line, wherein a substrate of the MOS transistor is not connected to a fixed potential terminal, and the potential of the substrate is switched and controlled so that the MOS transistor time-selectively becomes an enhancement type or a depletion type which can prevent a threshold voltage loss over time.

REFERENCES:
patent: 4259729 (1981-03-01), Tokushige
patent: 4296340 (1981-10-01), Horan
patent: 4791317 (1988-12-01), Winnerl et al.
patent: 4802123 (1989-01-01), Togita
patent: 4817055 (1989-03-01), Arakawa et al.
patent: 4862415 (1989-08-01), Nakano
patent: 4864373 (1989-09-01), Miyashita
patent: 4873668 (1989-10-01), Winnerl et al.

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