Integrated circuit package having a face-to-face IC chip arrange

Details Integrated circuit package having a face-to-face IC chip arrange Integrated circuit package having a face-to-face IC chip arrange

1993-12-01

1995-08-01

Jackson, Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Chip mounted on chip

257686, 257678, 257774, 257787, H01L 2302, H01L 2312, H01L 2344, H01L 2944

Patent

active

054382246

ABSTRACT:
An integrated circuit package includes a stacked integrated circuit chip arrangement (140) placed on a circuit substrate. The stacked IC chip arrangement includes a first IC chip (110) and a second IC chip (120), each having an array of terminals (116, 126) and being positioned in a face-to-face manner. An interposed substrate (130) is positioned between the first IC chip (110) and the second IC chip (120) such that circuitry disposed on the interposed substrate (130) provides electrical connection among the arrays of terminals of the first IC chip (110) and the second IC chip (120) and external circuitry.

REFERENCES:
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patent: 4700276 (1987-10-01), Freyman et al.
patent: 4700473 (1987-10-01), Freyman et al.
patent: 4792532 (1988-12-01), Othani et al.
patent: 4819041 (1989-04-01), Redmond
patent: 4862322 (1989-08-01), Bickford et al.
patent: 5198963 (1993-03-01), Jupta et al.
patent: 5331235 (1994-07-01), Chun

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