Structure of a non-destructive readout dynamic random access mem

Details Structure of a non-destructive readout dynamic random access mem Structure of a non-destructive readout dynamic random access mem

1998-05-15

2000-03-21

Hardy, David

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257301, 257306, H07L 27108

Patent

active

060405953

ABSTRACT:
A structure of dynamic random access memory includes a field effect transistor (FET), a capacitor, a world line and a bit line. The gate of the FET is electrically coupled to the word line in which a voltage source is supplied through the world line to the gate. The drain region of the FET is electrically coupled to a lower electrode of the capacitor. The capacitor has an upper electrode being electrically coupled to the gate of the FET either. The source region of the FET is electrically coupled to the bit line.

REFERENCES:
patent: 5146300 (1992-09-01), Hamamoto et al.
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patent: 5463234 (1995-10-01), Toriumi et al.
patent: 5498889 (1996-03-01), Hayden
patent: 5559733 (1996-09-01), McMillan et al.
patent: 5689456 (1997-11-01), Kobayashi
patent: 5753946 (1998-05-01), Naiki et al.

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