Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1999-04-28
2000-03-21
Quach, T. N.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438629, 438633, 438660, 438687, H01L 2144
Patent
active
060402407
ABSTRACT:
Disclosed herein is a method for forming a copper interconnect in which a substrate having the copper interconnect is exposed to atmosphere after the substrate is cooled to a temperature below 160.degree. C. under a non-oxidizable atmosphere. The exposure of the substrate to a relatively high temperature conventionally makes an electric resistance between interconnects on the substrate higher to prevent high integration. In accordance with the present invention, the above electric resistance can be reduced to smoothly realize the high integration because of the exposure of the substrate to a relatively low temperature.
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Braeckelman, G., et al., "Deposition of barrier layer and CVD copper under no exposed wafer conditions: adhesion performance and process integration," Materials for Advanced Metallization, Mar. 16-19, 1997, pp. 27-29.
Ueno, K., et al., "Uniform (111) Textured Cu CVD on Vacuum Anneated Cu Seed Layer," Interconnect Technology Conference, Jun. 1-3, 1998, Proceedings of the IEEE International, pp. 119-121.
NEC Corporation
Quach T. N.
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