Metal working – Method of mechanical manufacture – Electrical device making
Patent
1985-06-24
1987-06-23
Roy, Upendra
Metal working
Method of mechanical manufacture
Electrical device making
29576B, 29578, 148 15, 148175, 148187, 148DIG93, 357 67, 357 71, 427 531, H01L 21265, C23C 500
Patent
active
046741763
ABSTRACT:
In the fabrication of multilevel integrated circuits, each metal layer is planarized by heating to momentarily melt the layer. The layer is melted by sweeping laser pulses of suitable width, typically about 1 microsecond duration, over the layer in small increments. The planarization of each metal layer eliminates irregular and discontinuous conditions between successive layers. The planarization method is particularly applicable to circuits having ground or power planes and allows for multilevel interconnects. Dielectric layers can also be planarized to produce a fully planar multilevel interconnect structure. The method is useful for the fabrication of VLSI circuits, particularly for wafer-scale integration.
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Carnahan L. E.
Hightower Judson R.
Roy Upendra
Sartorio Henry P.
The United States of America as represented by the United States
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